Integrated circuit design aims not only to create a nominal circuit design that meets a set of predetermined specifications, but also to ensure that the circuit design can be manufactured reliably. Numerous sources of variation may cause some instances of a completed circuit design (e.g., fully simulated or fabricated microchips) to fail, that is, to not achieve at least one of the predetermined design specifications. Quite often, “testing” actually refers to full simulation prior to actual fabrication; that nomenclature is adopted in this description for simplicity. Designers therefore seek to model such variation to estimate and reduce the susceptibility of manufactured designs to such failure.
Designers often find it helpful to design against a set of “design corners” (also known as process corners or simply corners), which are combinations of parameters that lead to a specified variation in the circuit performance measures. The variation is often expressed as a number (k) of standard variations (sigma or σ). The number k is around 3 for most applications, but can be as high as 4-6 in applications where high yield is desired, such as medical and automotive applications, or when the circuit is highly repetitive, with numerous instances of the circuit inside the same chip. Such corners may help a designer determine the workable ranges for design parameters, from which more detailed design refinements may be made.
Scaled-sigma sampling (SSS) is a high yield estimation technique described in Sun et. al., “Fast statistical analysis of rare circuit failure events via scaled-sigma sampling for high-dimensional variation space,” IEEE TCAD, vol. 34, no. 7. pp. 1096-1109, Jul. 2015. SSS involves the scaling up of the variation of all process parameters by a factor (s) in order to increase the failure rate, thereby generating a sufficient number of failure samples for analysis. This enables estimates to be made in high yield situations, where the number of failures is statistically low. FIG. 1 is a graph illustrating the effects of sigma scaling. FIG. 1 includes example failure rate curves for scaling values of 1 and 2 as a function of x, where x is a process parameter. A failure region 50 is defined based on a performance target. As evident, the failure rate increases with scaling value.
The inventors have discovered that SSS has certain drawbacks including reduced accuracy for strongly non-linear failure boundaries (e.g., super-linear or sub-linear), no meaningful results when the yield is extremely high (insufficient number of failures despite sigma scaling), and no ability to create corners.